<HTML>
<HEAD>
<TITLE>Map Report</TITLE>
<link href="file:///G:/ProgramData/lscc/radiantide/data/theme/css/light/report.css" rel="stylesheet" type="text/css" media="screen"/>
<link href="file:///G:/ProgramData/lscc/radiantide/data/theme/css/print/report.css" rel="stylesheet" type="text/css" media="print"/>
<style type="text/css">
#toc {
  position: fixed;
  right: 2px;
  top: 2px;
  padding: 2px 5px 2px 5px;
  background-color:rgba(210,210,210,0.1);
  border-style: solid;
  border-color: rgba(192,192,192,0.8);
  border-width:1px;
}
#toc_list {
  display: none;
  }
</style>

<script type="text/javascript">
<!--
function showTocList() {
var a = document.getElementById("toc_list");
a.style.display = "block";
}

function hideTocList() {
var a = document.getElementById("toc_list");
if (a)
    a.style.display = "none";
}

//-->
</script>

</HEAD>

<BODY>

<DIV id="content" onclick="hideTocList()"><PRE>
<A name="Mrp"></A>                         Lattice Mapping Report File
Design:  hs_dac
Family:  iCE40UP
Device:  iCE40UP5K
Package: SG48
Performance Grade:  High-Performance_1.2V

Mapper:    version Radiant Software (64-bit) 2022.1.0.52.3
Mapped on: Sun Mar 12 05:42:28 2023


<A name="mrp_di"></A><B><U><big>Design Information</big></U></B>

Command line:   map -i dds_pro_impl_1_syn.udb -pdc G:/win10/Desktop/Embedded/FPG
     A/lattice/mycode/dds_pro_fpga/source/impl_1/impl_1.pdc -o
     dds_pro_impl_1_map.udb -mp dds_pro_impl_1.mrp -hierrpt -gui

<A name="mrp_ds"></A><B><U><big>Design Summary</big></U></B>
   Number of slice registers: 141 out of  5280 (3%)
   Number of I/O registers:      4 out of   117 (3%)
   Number of LUT4s:           228 out of  5280 (4%)
      Number of logic LUT4s:              98
      Number of inserted feedthru LUT4s:  30
      Number of ripple logic:             50 (100 LUT4s)
   Number of IO sites used:   18 out of 39 (46%)
      Number of IO sites used for general PIO: 18
      Number of IO sites used for I3C: 0 out of 2 (0%)
      (note: If I3C is not used, its site can be used as general PIO)
      Number of IO sites used for PIO+I3C: 18 out of 36 (50%)
      Number of IO sites used for OD+RGB IO buffers: 0 out of 3 (0%)
      (note: If RGB LED drivers are not used, sites can be used as OD outputs,
       see TN1288 iCE40 LED Driver Usage Guide)
      Number of IO sites used for PIO+I3C+OD+RGB: 18 out of 39 (46%)
   Number of DSPs:             7 out of 8 (87%)
   Number of I2Cs:             0 out of 2 (0%)
   Number of High Speed OSCs:  0 out of 1 (0%)
   Number of Low Speed OSCs:   0 out of 1 (0%)
   Number of RGB PWM:          0 out of 1 (0%)
   Number of RGB Drivers:      0 out of 1 (0%)
   Number of SCL FILTERs:      0 out of 2 (0%)
   Number of SRAMs:            0 out of 4 (0%)
   Number of WARMBOOTs:        0 out of 1 (0%)
   Number of SPIs:             0 out of 2 (0%)
   Number of EBRs:             6 out of 30 (20%)
   Number of PLLs:             1 out of 1 (100%)
   Number of Clocks:  2
      Net clk_60M: 126 loads, 126 rising, 0 falling (Driver: Pin
     u_pll_60M.lscc_pll_inst.u_PLL_B/OUTCORE)
      Net clk_12M_c: 1 loads, 1 rising, 0 falling (Driver: Port clk_12M)
   Number of Clock Enables:  6
      Net VCC_net: 6 loads, 0 SLICEs
      Net u_da_wave_send.n796: 15 loads, 15 SLICEs
      Pin key_rst_n: 3 loads, 3 SLICEs (Net: key_rst_n_c)
      Net u_spi_slave.clk_60M_enable_1: 8 loads, 7 SLICEs
      Net n794: 30 loads, 30 SLICEs
      Net u_spi_slave.n251: 18 loads, 18 SLICEs
   Number of LSRs:  4
      Net rst_n_i_N_84: 43 loads, 43 SLICEs
      Net u_spi_slave.n814: 3 loads, 3 SLICEs

      Net u_spi_slave.n812: 1 loads, 1 SLICEs
      Net u_spi_slave.n816: 3 loads, 3 SLICEs
   Top 10 highest fanout non-clock nets:
      Net rst_n_i_N_84: 43 loads
      Net n794: 33 loads
      Net byte_data_received[11]: 32 loads
      Net u_da_wave_send.n796: 25 loads
      Net byte_data_received[10]: 24 loads
      Net VCC_net: 22 loads
      Net wav_type[1]: 20 loads
      Net u_spi_slave.n251: 18 loads
      Net rd_addr_i[9]: 17 loads
      Net rd_addr_i[1]: 13 loads




   Number of warnings:  0
   Number of errors:    0




<A name="mrp_dwe"></A><B><U><big>Design Errors/Warnings</big></U></B>

   No errors or warnings present.



<A name="mrp_ioa"></A><B><U><big>IO (PIO) Attributes</big></U></B>

+---------------------+-----------+-----------+-------+-------+-----------+
| IO Name             | Direction | Levelmode |  IO   |  IO   | Special   |
|                     |           |  IO_TYPE  |  REG  |  DDR  | IO Buffer |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[6]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[7]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[8]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[9]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_clk              | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| MISO                | OUTPUT    |           | O     |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[5]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[4]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[3]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[2]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[1]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| da_data[0]          | OUTPUT    |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| led1                | OUTPUT    |           |       |       |           |

+---------------------+-----------+-----------+-------+-------+-----------+
| clk_12M             | INPUT     |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| key_rst_n           | INPUT     |           |       |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| SCK                 | INPUT     |           | I     |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| SSEL                | INPUT     |           | I     |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+
| MOSI                | INPUT     |           | I     |       |           |
+---------------------+-----------+-----------+-------+-------+-----------+



<A name="mrp_rm"></A><B><U><big>Removed logic</big></U></B>

Block i1 was optimized away.



<A name="mrp_pll"></A><B><U><big>PLL/DLL Summary</big></U></B>
---------------

PLL 1:                                 Pin/Node Value
  PLL Instance Name:                            u_pll_60M/lscc_pll_inst/u_PLL_B
  Input Reference Clock:               PIN      clk_12M_c
  Output Clock(CoreA):                 NODE     clk_60M
  Output Clock(GlobalA):                        NONE
  Output Clock(CoreB):                          NONE
  Output Clock(GlobalB):                        NONE
  Feedback input:                      NODE
       u_pll_60M.lscc_pll_inst.feedback_w
  Internal Feedback output:            NODE
       u_pll_60M.lscc_pll_inst.feedback_w
  BYPASS signal:                                GND
  LATCH signal:                                 GND
  Lock Signal:                                  NONE
  Input Clock Frequency (MHz):                  NA
  Reference Divider:                            0
  Feedback Divider:                             79
  VCO Divider:                                  4
  ENABLE_ICEGATE_PORTA:                         0
  ENABLE_ICEGATE_PORTB:                         0
  PLLOUT_SELECT_PORTA:                          GENCLK
  PLLOUT_SELECT_PORTB:                          GENCLK
  SHIFTREG_DIV_MODE:                            0
  DELAY_ADJUSTMENT_MODE_RELATIVE:               FIXED
  FDA_RELATIVE:                                 0
  FEEDBACK_PATH:                                SIMPLE
  DELAY_ADJUSTMENT_MODE_FEEDBACK:               FIXED
  FDA_FEEDBACK:                                 0
  FILTER_RANGE:                                 1
  EXTERNAL_DIVIDE_FACTOR:                       NONE
  TEST Mode:                                    0



<A name="mrp_asic"></A><B><U><big>ASIC Components</big></U></B>
---------------

Instance Name: u_tri_rom/lscc_rom_inst/u_rom/PRIM_MODE.xADDR[0].xDATA[2].mem_fil
     e.mem0/iCE40UP.sp4k

         Type: EBR
Instance Name: u_tri_rom/lscc_rom_inst/u_rom/PRIM_MODE.xADDR[0].xDATA[1].mem_fil
     e.mem0/iCE40UP.sp4k
         Type: EBR
Instance Name: u_tri_rom/lscc_rom_inst/u_rom/PRIM_MODE.xADDR[0].xDATA[0].mem_fil
     e.mem0/iCE40UP.sp4k
         Type: EBR
Instance Name: u_da_wave_send/mult_15
         Type: DSP
Instance Name: u_da_wave_send/sin_data_i_9__I_0
         Type: DSP
Instance Name: u_da_wave_send/tri_data_i_9__I_0
         Type: DSP
Instance Name: u_pll_60M/lscc_pll_inst/u_PLL_B
         Type: PLL
Instance Name: u_spi_slave/SCKr_i0
         Type: IOLOGIC
Instance Name: u_spi_slave/MOSIr_i0
         Type: IOLOGIC
Instance Name: u_spi_slave/mult_110
         Type: DSP
Instance Name: u_spi_slave/byte_data_sent__i8
         Type: IOLOGIC
Instance Name: u_spi_slave/mult_24
         Type: DSP
Instance Name: u_spi_slave/SSELr_i0
         Type: IOLOGIC
Instance Name: u_spi_slave/mult_109
         Type: DSP
Instance Name: u_spi_slave/mult_29
         Type: DSP
Instance Name: u_rom_1024x10b/lscc_rom_inst/u_rom/PRIM_MODE.xADDR[0].xDATA[2].me
     m_file.mem0/iCE40UP.sp4k
         Type: EBR
Instance Name: u_rom_1024x10b/lscc_rom_inst/u_rom/PRIM_MODE.xADDR[0].xDATA[1].me
     m_file.mem0/iCE40UP.sp4k
         Type: EBR
Instance Name: u_rom_1024x10b/lscc_rom_inst/u_rom/PRIM_MODE.xADDR[0].xDATA[0].me
     m_file.mem0/iCE40UP.sp4k
         Type: EBR



<A name="mrp_consum"></A><B><U><big>Constraint Summary</big></U></B>
------------------

   Total number of constraints: 19
   Total number of constraints dropped: 0



<A name="mrp_runtime"></A><B><U><big>Run Time and Memory Usage</big></U></B>
-------------------------

   Total CPU Time: 0 secs
   Total REAL Time: 0 secs
   Peak Memory Usage: 61 MB







Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995
     AT&amp;T Corp.   All rights reserved.
Copyright (c) 1995-2001 Lucent
     Technologies Inc.  All rights reserved.
Copyright (c) 2001 Agere Systems
     All rights reserved.
Copyright (c) 2002-2022 Lattice Semiconductor
     Corporation,  All rights reserved.



<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
<BR>
</PRE></DIV>

<DIV id="toc" class="radiant"><span onmousemove="showTocList()">Contents</span>
<UL id="toc_list">
<LI><A href=#mrp_di>Design Information</A></LI>
<LI><A href=#mrp_ds>Design Summary</A></LI>
<LI><A href=#mrp_dwe>Design Errors/Warnings</A></LI>
<LI><A href=#mrp_ioa>IO (PIO) Attributes</A></LI>
<LI><A href=#mrp_rm>Removed logic</A></LI>
<LI><A href=#mrp_pll>PLL/DLL Summary</A></LI>
<LI><A href=#mrp_asic>ASIC Components</A></LI>
<LI><A href=#mrp_consum>Constraint Summary</A></LI>
<LI><A href=#mrp_runtime>Run Time and Memory Usage</A></LI>
</UL>
</DIV>

<button id="back_to_top" class="radiant" onclick="scrollToTop()">&lt;</button>
<script type="text/javascript">
<!--
var scrollStep = 0;
function scrollToTop(){
  var funScroll = function() {
    var top = document.body.scrollTop;
    if (top == 0) {
      scrollStep = 0;
      return;
    }
    if (scrollStep == 0)
      scrollStep = top/20 + 1;
    top -= scrollStep;
    if (top < 0)
      top = 0;
    document.body.scrollTop = top;
    requestAnimationFrame(funScroll);
  };
  funScroll();
}

window.addEventListener('scroll', function(e) {
  var backToTop = document.getElementById('back_to_top')
  if (document.body.scrollTop > 0) {
    backToTop.style.display = 'block';
  } else {	backToTop.style.display = 'none'  }});

//-->
</script>

<style type="text/css">
#back_to_top {
  bottom:20px; right:20px;
  width:30px; height:30px;
  font-size: 20px;
  padding: 2px 5px 2px 5px;
  position:fixed;
  background-color:rgba(210,210,210,0.1);
  border-style: solid;
  border-color: rgba(192,192,192,0.8);
  border-width:1px;
  display:none;
  -webkit-transform: rotate(90deg);
  -webkit-transform-origin:50% 50%;
}
#back_to_top:focus {
  outline-width:0px;
}
</style>

</BODY>

